Central Platform ECU for Advanced Driver Assistance
The objective of DREAMS is to develop a cross-domain architecture and design tools for networked complex systems where application subsystems of different criticality, executing on networked multi-core chips, are supported.
DREAMS delivers architectural concepts, meta-models, virtualization technologies, model-driven development methods, tools, adaptation strategies and validation, verification and certification methods for the seamless integration of mixed-criticality to establish security, safety, real-time performance as well as data, energy and system integrity.
DREAMS leverages multi-core platforms for a hierarchical system perspective of mixed-criticality applications combining the chip- and cluster-level. This system perspective is established by virtualization (e.g. secure and timely end-to-end channels with different on-chip and off-chip segments), platform models and tools and integrated resource management, resulting in higher flexibility, adaptability and energy efficiency.
The consortium consists of major embedded system suppliers and OEMs, encompassing a broad range of application domains (avionics, wind power, healthcare), supported by leading research and academic organizations.
DREAMS will significantly reduce development lifecycle and certification efforts, and enable mixed criticality product lines. The impact includes a further reduction of time-to-market, decreased development, deployment and maintenance cost, and the exploitation of the economies of scale through cross-domain components and tools.
Based on strong foundation in European and national initiatives, DREAMS establishes a European reference architecture for mixed-criticality systems by consolidating and extending platform technologies and development methods. The project actively contributes to community building and standardization to facilitate industrial harmonization and the uptake of results.
Within the DREAMS project TTTech’s research and development focuses on mixed-criticality networks, dynamic networking in real-time systems in chip IP development (connecting on-chip and off-chip networks), embedded software and tooling and contribute to the definition of methods for validation and verification. Concretely, TTTech contributes to the following objectives:
This project has received funding from the European Union’s Seventh Framework Programme for research, technological development and demonstration under grant agreement no 610640.